[1]
PAXSON V, ASANOVIC K, DHARMAPURIKAR S, et al. Rethinking hardware support for network analysis and intrusion prevention [C]// Proceedings of USENIX Workshop on Hot Topics in Security. Boston: USENIX Association Berkeley, 2006: 63-68.
[2]
LAKSHMINARAYANAN K, RANGARAJAN A, VENKATACHARY S. Algorithms for advanced packet classification with ternary CAMs [C]// Proceedings of ACM SIGCOMM 2005. New York: ACM, 2005: 193-204.
[3]
CLARK C R, SCHIMMEL D E. Scalable pattern matching for high speed networks [C]// Proceedings of IEEE FCCM 2004. Piscataway: IEEE, 2004: 249-257.
[4]
黄昆,张大方.一种面向深度数据包检测的索引拆分Bloom过滤器[J]. 中国科学:信息科学,2010,40(8):1062-1077.
[5]
王志佳,顾健.一种改进的自动机压缩算法在深度包检测中的应用[J].信息网络安全,2010(10):76-78.
[6]
徐乾,鄂跃鹏,葛敬国,等.深度包检测中一种高效的正则表达式压缩算法[J].软件学报,2009,20(8):2214-2226.
[7]
SMITH R, ESTAN C, JHA S, et al. Deflating the big bang: fast and scalable deep packet inspection with extended finite automata [C]// Proceedings of ACM SIGCOMM 2008. New York: ACM, 2008: 207-218.
[8]
LU H, ZHENG K, LIU B. A memory-efficient parallel string matching architecture for high-speed intrusion detection[J]. IEEE Selected Areas in Communications, 2006,24(10): 1793-1804.
[9]
TAN L, SHERWOOD T. Architectures for bit-split string scanning in intrusion detection [J]. IEEE Micro, 2006, 26(1):110-117.
[10]
潘志浩,杨博文,曹炳尧.基于网络处理器的深度包检测系统的研究[J]. 微计算机信息,2009,25(27):115-116.
[11]
JUNG H J, BAKER Z K, PRASANNA V K. Performance of FPGA implementation of bit-split architecture for intrusion detection systems [C]// RAW06: Proceedings of the Reconfigurable Architectures Workshop at IPDPS. Washington, DC: IEEE Computer Society, 2006:8-10.
[12]
HUA N, SONG H, LAKSHMAN T V. Variable-stride multi-pattern matching for scalable deep packet inspection [C]// Proceedings of IEEE INFOCOM 2009. Piscataway: IEEE, 2009:415-423.
[13]
PAPADOPOULOS G, PNEVMATIKATOS D N. Hashing memory=low cost,exact pattern matching [C]// FPL 2005: 15th International Conference on Field Programmable Logic and Applications. Tampere: IEEE Circuits and Systems Society, 2005: 39-44.
[14]
SOURDIS I, PNEVMATIKATOS D, WONG S, et al. A reconfigurable perfect-hashing scheme for packet inspection [C]// FPL 2005: 15th International Conference on Field Programmable Logic and Applications. Tampere: IEEE Circuits and Systems Society, 2005: 644-647.
[15]
LU Y, PRABHAKAR B, BONOMI F. Perfect hashing for network application [C]// IEEE Symposium on Information Theory. Piscataway: IEEE, 2006:2774-2778.
[16]
RAMAKRISHNA M V, FU E, BAHCEKAPILI E. Efficient hardware hashing functions for high performance computers[J]. IEEE Transactions on Computers,1997,46(12):1378-1381. |