计算机应用 ›› 2013, Vol. 33 ›› Issue (05): 1459-1462.DOI: 10.3724/SP.J.1087.2013.01459

• 典型应用 • 上一篇    下一篇

基于FPGA实时错误检测技术

琚小明,张皆浩,张逸中   

  1. 华东师范大学 软件学院,上海 200062
  • 收稿日期:2012-11-27 修回日期:2013-01-11 出版日期:2013-05-01 发布日期:2013-05-08
  • 通讯作者: 琚小明
  • 作者简介:琚小明(1967-),男,浙江衢州人,副教授,博士,CCF会员,主要研究方向:嵌入式系统设计、软硬件协同设计方法、嵌入式系统可靠性;张皆浩(1992-),男,上海人,主要研究方向:软件工程、嵌入式技术;张逸中(1986-),男,上海人,硕士研究生,主要研究方向:软硬件协同设计方法、FPGA逆向工程。
  • 基金资助:

    上海高校知识服务平台资助项目(ZF1213);上海市高可信计算重点实验室开放课题(07dz22304201109);工业和信息化部的电子信息产业发展基金资助项目

Real-time error detection techniques based on FPGA

JU Xiaoming,ZHANG Jiehao,ZHANG Yizhong   

  1. Software Engineering Institute, East China Normal University,Shanghai 200062,China
  • Received:2012-11-27 Revised:2013-01-11 Online:2013-05-08 Published:2013-05-01
  • Contact: JU Xiaoming
  • Supported by:

    The Shanghai university knowledge service platform;Ministry of Industry and Information Technology Electronic Information Industry Development Fund

摘要: 高可靠性的系统都要求具备实时错误检测。针对内建错误检测,提出了三种在线模型的自我实时检测方法。错误检测模型利用了现场可编程门阵列(FPGA)中的两个管道,通过比较当前配置信息与FPGA外配置内存中的原始信息是否一致,可以实时地检测错误,而且可以通过比较它们的配置数据来定位那些具有单粒子翻转(SEU)错误的逻辑块。仿真测试结果表明所提出的方法比在线BIST有着更好的性能。

关键词: 错误检测, 实时, 可靠性, 自检单元, 现场可编程门阵列

Abstract: Real-time error detections are needed in highly reliable systems. This paper presented three online models with self-checking method for built-in error detection. The error detection model adopted two pipes in the Field Programmable Gate Array (FPGA). By comparing whether the current configuration information and FPGA configuration memory of the original information were consistent, the model can detect errors in real-time, and by comparing their configuration data, it also can locate the error where logic blocks have undergone an Single Event Upset (SEU). The testing result shows that the method proposed in this article has better performance than that of online Built-In Self-Test unit (BIST).

Key words: error detection, real-time, reliability, Built-In Self-Test unit (BIST), Field Programmable Gate Array (FPGA)

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