计算机应用 ›› 2013, Vol. 33 ›› Issue (01): 163-167.DOI: 10.3724/SP.J.1087.2013.00163

• 信息安全 • 上一篇    下一篇

密码芯片中二元扩域Eta双线性对安全算法

柴佳晶1,顾海华1,2,包斯刚1   

  1. 1. 上海华虹集成电路有限责任公司 设计部, 上海 201203
    2. 上海交通大学 计算科学与工程系, 上海 200240
  • 收稿日期:2012-07-18 修回日期:2012-08-30 出版日期:2013-01-01 发布日期:2013-01-09
  • 通讯作者: 柴佳晶
  • 作者简介:柴佳晶(1984-),女,上海人,工程师,主要研究方向:安全芯片、密码算法;顾海华(1981-),男,上海人,工程师,博士,主要研究方向:RSA密码、椭圆曲线密码的快速安全实现;包斯刚(1977-),男,上海人,高级工程师,主要研究方向:芯片安全、密码电路。
  • 基金资助:

    2009年上海科委集成电路设计专项(09706200600)

Security algorithm for Eta bilinear pairing over binary fields in crypto chip

CHAI Jiajing1,GU Haihua1,2,BAO Sigang1   

  1. 1. Department of Design, Shanghai Huahong Integrated Circuit Company Limited, Shanghai 201203, China
    2. Department of Computer Science and Engineering, Shanghai Jiao Tong University, Shanghai 200240, China
  • Received:2012-07-18 Revised:2012-08-30 Online:2013-01-01 Published:2013-01-09
  • Contact: CHAI Jiajing

摘要: 为了在密码芯片中安全快速地实现二元扩域Eta双线性对,提出了基于平方方法的抗功耗攻击实现算法。分别研究了基于平方方法的密钥盲化和明文盲化方案,给出了具体的基于平方方法的抗功耗攻击算法的实现细节。在典型有限域下,基于平方方法的抗功耗攻击算法的实现效率比基于平方根方法提升10%以上,并且不需要存储任何预计算变量。另外,讨论了将目前用于三元扩域的Loop Unrolling方法的思想应用到所提算法后,进一步将运算效率提升了约3%。效率的提升和存储量的优化使得算法更适用于安全密码芯片。

关键词: Eta双线性对, 二元扩域, 抗功耗攻击, 密码芯片, 效率

Abstract: In order to securely and efficiently realize Eta bilinear pairing over binary fields in crypto chip, a power analysis resistant algorithm was proposed based on square method. The key masking and data masking schemes based on square method were researched respectively, and the implementation details of power analysis resistant algorithm were given based on square method. In typical fields, the implementation efficiency of power analysis resistant algorithm based on square method was increased by 10% or more compared to the algorithm based on square root method, and the proposed algorithm did not need to store any pre-computational variable. Furthermore, the idea of loop unrolling methods in characteristic three was expanded to the proposed algorithm, which further increased the implementation efficiency by about 3%. With the improvement of efficiency and optimization of storage, the proposed algorithm is more suitable for secure crypto chip.

Key words: Eta bilinear pairing, binary field, resistant to power analysis attack, crypto chip, efficiency

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