关键词: 嵌入式微处理器, 流水线, ARM指令集, 分支预测, 失效代价

Abstract: Concerning the specific application environment of embedded microprocessor, the branch prediction technology was researched in this paper, and a new scheme of branch prediction was proposed. Compatible with cache design, jump direction and destination address of branch prediction happened on extended instruction bus. The unexecuted instruction and address pointer were saved for possible recovery after misprediction, which reduced misprediction penalty, simultaneously guaranteed the instruction flow to execute correctly. The study shows this scheme is of little hardware spending, high prediction efficiency and low misprediction penalty.

Key words: microprocessor, pipeline, ARM instruction set, branch prediction, misprediction penalty