Due to complex structure of Three-Dimensional Stacked Integrated Circuit （3D SIC）， it is more difficult to design an efficient test structure for it to reduce test cost than for Two-Dimensional Integrated Circuit （2D IC）. For decreasing cost of 3D SIC testing， a Three-Dimensional Linear Feedback Shift Register （3D-LFSR） test structure was proposed based on Linear Feedback Shift Register （LFSR）， which can effectively adapt to different test phases of 3D SIC. The structure was able to perform tests independently in the pre-stacking tests. After the stacking， the pre-stacking test structure was reused and reconfigured into a test structure suitable for the current circuit to be tested， and the reconfigured test structure was able to further reduce test cost. Based on this structure， the corresponding test data processing method and test flow were designed， and the mixed test mode was adopted to reduce the test time. Experimental results show that compared with the dual-LFSR structure， 3D-LFSR structure has the average power consumption reduced by 40.19%， the average area overhead decreased by 21.31%， and the test data compression rate increased by 5.22 percentage points. And， using the hybrid test mode reduces the average test time by 20.49% compared to using the serial test mode.