Specification and verification environment for embedded system over CDM

doi:10.3724/SP.J.1087.2005.0426

Journal of Computer Applications ›› 2005, Vol. 25 ›› Issue (02): 426-429.DOI: 10.3724/SP.J.1087.2005.0426

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Specification and verification environment for embedded system over CDM

LU Zhao¹, ZHAO Min-yuan², GU Jun-zhong¹

1. Department of Computer Science, East China Normal University, Shanghai 200062, China; 2. Department of Computer Science, Shanghai University of Engineering Science, Shanghai 200065, China

Online:2005-02-01 Published:2005-02-01

基于CDM的嵌入式系统描述与模拟验证环境

吕钊¹，赵敏媛，顾君忠¹

1.华东师范大学计算机系； 2.上海工程技术大学计算机系

基金资助:
上海市科学技术发展基金资助项目(3506)

Abstract

Abstract: This paper illustrated a new approach and environment to describe and simulate the embedded system. Firstly, auther constructed the CDM models to describe the design requirements of the specified system. Secondly, in order to get the aim of verification of a specified system, according to the converting rules, the approach automatic converted the requirements documents to the CDM models and SystemC codes to simulate a specified system. Finally, an application example using the above approach was illustrated.

Key words: embedded system, hardware/software co-design, CDM, SystemC

摘要： 从嵌入式系统的设计需求出发,提出采用CDM构造嵌入式系统的描述模型,然后根据相关规则将需求文档转换为CDM描述模型、把CDM描述模型转换成SystemC代码,以完成嵌入式系统的模拟验证的方法和实验环境。最后介绍了该方法的一个应用实例。

关键词: 嵌入式系统, 系统描述, CDM模型, 模拟验证

CLC Number:

TP302

LU Zhao, ZHAO Min-yuan, GU Jun-zhong. Specification and verification environment for embedded system over CDM[J]. Journal of Computer Applications, 2005, 25(02): 426-429.

吕钊，赵敏媛，顾君忠. 基于CDM的嵌入式系统描述与模拟验证环境[J]. 计算机应用, 2005, 25(02): 426-429.

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Specification and verification environment for embedded system over CDM

基于CDM的嵌入式系统描述与模拟验证环境

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