Abstract: The IP Core of JPEG Image compression algorithm was designed based on the 2-D DCT algorithm adopting the matrix decomposition. The IP Core and all of the modules were described and simulated by Verilog-HDL language at RTL level. Experiment results show that the design of the proposed method is validated.

Key words: JPEG, 2D-DCT, IP core, image compression

摘要： 以基于矩阵分解的二维DCT算法为基础,设计了JPEG图像压缩算法的IP核,并用Verilog HDL语言对各模块和整个IP核进行了RTL级描述和仿真,实验结果验证了设计的正确性。

关键词: JPEG, 2D-DCT, IP核, 图像压缩