Nowadays， real-time 3D graphics rendering is undergoing technological innovation， with a surge in applications of real-time ray tracing technology. However， from a computational perspective， ray tracing remains expensive， as traditional hardware cannot support such computational demands. New Graphics Processing Units （GPUs） must balance performance， power consumption， and higher complexity scenarios， making hardware acceleration technologies central to real-time ray tracing. Firstly， the theoretical foundations of ray tracing was introduced， and based on the two most dominant accelerated data structures — KD-Tree （K-Dimensional Tree） and Bounding Volume Hierarchies based on Tree （BVH-Tree）， primitive segmentation， construction methods， optimization methods， and traversal acceleration were investigated to reveal the potential of these two structures for hardware acceleration. Secondly， the dedicated acceleration hardware developed in each stage were summarized from three perspectives： fixed-function design， hardware architecture design， and scheduling and data management to reduce memory bandwidth. Thirdly， mainstream industry oriented ray tracing GPU solutions and future development trends for industry were researched. Finally， the current situation and limitations of hardware acceleration schemes were discussed， along with potential directions for performance optimization.