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Mutant generation strategy based on program dependencies
Tian TIAN, Yangyang SHAO, Miaomiao WANG, Huan YANG
Journal of Computer Applications    2024, 44 (9): 2863-2870.   DOI: 10.11772/j.issn.1001-9081.2023091319
Abstract172)   HTML4)    PDF (1314KB)(82)       Save

Aiming at the problem of large numbers of mutants leading to high mutation testing cost, a Program Dependency based Mutant Generation (PDMG) strategy was proposed to select the mutation implementation objects satisfying certain constraint conditions for mutation generation. Firstly, program dependency graphs were generated based on data dependencies and control dependencies. Then, based on the mutation object selection strategy and program dependency graphs, the dependency statements were selected as mutation objects. Finally, the mutation operator was injected to the selected mutation objects in order to generate mutants. The proposed method was applied to mutation testing of 8 benchmark test programs. Experimental results show that compared with Random Selection (RS) and Mutation Operator Selection (MOS) strategies, PDMG strategy can reduce the mutants by 52.20% on average, improving the execution efficiency of mutation testing without reducing the effectiveness of mutation testing.

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Communication coverage reduction method of parallel programs based on dominant relation
ZHANG Chen, TIAN Tian, YANG Xiuting, GONG Dunwei
Journal of Computer Applications    2021, 41 (6): 1741-1747.   DOI: 10.11772/j.issn.1001-9081.2020091369
Abstract357)      PDF (944KB)(402)       Save
The increase of communication scale and non-deterministic communication make the communication test of Message-Passing Interface (MPI) parallel programs more difficult. In order to solve the problems, a new method of reducing communication coverage based on dominant relation was proposed. Firstly, based on the correspondence between communications and communication statements, the reduction problem of communications was converted into a reduction problem of communication statements. Then, the dominant relation of statements was used to solve the reduction set of communication statement set. Finally, the communications related to the reduction set were selected as the targets to be covered, so that the test data covering these targets covered all the communications. The proposed method was applied to 7 typical programs under test. Experimental results show that, compared with the test data generation method with all communication as coverage targets, the proposed method can reduce the generation time of test data by up to 95% without reducing the coverage rate of communications, indicating that the proposed method can improve the generation efficiency of communication coverage test data.
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Design and implementation of high performance floating-point multiply acculate for M-DSP
CHE Wenbo, LIU Hengzhu, TIAN Tian
Journal of Computer Applications    2016, 36 (8): 2213-2218.   DOI: 10.11772/j.issn.1001-9081.2016.08.2213
Abstract490)      PDF (1001KB)(389)       Save
In order to meet the requirements on performance, power, area of floating-point computing in M-DSP, the architecture of a M-DSP, as well as the characteristics of all the instructions related to its floating-point computing were analyzed, and a Floating-point Multiply ACcumulate (FMAC) with high performance and low power was proposed. The proposed FMAC has structure with separated single and double precision path, which was divided into 6-stage pipelines; its key modules including multiplier and shift device were designed for reuse, and the operations including single and double precision floating-point multiplication, multiply-add and multiply-sub, floating-point complex multiplication, dot product, etc. were all implemented in it. The proposed FMAC was fully verified and synthesized by using Design Compiler with 45nm technique of Synopsys Company. Experimental results show that the frequency of the proposed FMAC is up to 1GHz, the area is 36856μm 2; compared with the FMAC of FT-XDSP, the area is saved by 12.95%, and the critical path was shortened by 2.17%.
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Packet verification based traceback method for IPv6 translation mechanism
ZHU Tian TIAN Ye MA Di
Journal of Computer Applications    2013, 33 (04): 926-930.   DOI: 10.3724/SP.J.1087.2013.00926
Abstract1023)      PDF (777KB)(758)       Save
IP address security is always a critical Internet security issue. As the transition from IPv4 to IPv6, multiple allocation modes of IP address, IPv6 translation techniques and IP spoofing increase the uncertainty of IP address of the host and the host has multiple IP addresses, which makes IP address resource more insecure. The emerging IPv6 home network, small enterprise network and campus network interconnect with traditional IPv4 network, which is typical and inevitable IPv6 translation scenario, and traditional IP traceback techniques cannot directly be applied to these scenarios. Therefore, this paper presented a new approach to solve IP traceback issue under these scenarios, which is able to go across the gateway that interconnects between IPv4 network and IPv6 network, and makes the destination network knowable for the source network. The traceback method guarantees the Internet fundamental resource safe.
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