Journal of Computer Applications ›› 2011, Vol. 31 ›› Issue (03): 617-620.DOI: 10.3724/SP.J.1087.2011.00617
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WANG Jian,LI Yu-bai,PENG Qi-cong
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王坚,李玉柏,彭启琮
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Abstract: For the Network-on-Chip (NoC) with virtual-output-queue router architecture, a design method to customize the buffer size for each virtual channel was proposed, so that the NoC communication performance was improved. With the restriction of limited buffer resources that could be used in NoC, the effect of virtual channel buffer size on the average packet latency in NoC was analyzed, and then a buffer allocation algorithm was proposed and buffer resources were allocated to the bottleneck of NoC. It thus improved the NoC performance without additional buffer resources cost. Finally, the effectiveness of the optimization design method was validated by simulation and the performance of NoC with optimized router was compared with the performance of NoC with un-optimized router.
Key words: Network-on-Chip (NoC), Virtual-output-Queue (VoQ), modeling, buffer allocation, simulation
摘要: 针对虚输出队列结构的路由节点所构成的片上网络(NoC),提出了一种定制化路由节点中各个虚拟通道缓存大小的方法,以提高片上网络的整体通信性能。在有限的片上缓存资源约束下,分析各个虚输入队列中缓存大小对数据通过片上网络的平均延迟的影响,并在此基础上提出一种缓存资源配置方法,以便将缓存资源分配到片上网络通信瓶颈处,从而在不增加缓存资源开销的情况下提高片上网络的通信性能。最后通过仿真验证了路由节点优化设计对提高片上网络性能的可行性,并同未优化的路由节点构成的片上网络性能进行了比较。
关键词: 片上网络, 虚输出队列, 建模, 缓存配置, 仿真
CLC Number:
TP302.1
WANG Jian LI Yu-bai PENG Qi-cong. Optimized design for network-on-chip router[J]. Journal of Computer Applications, 2011, 31(03): 617-620.
王坚 李玉柏 彭启琮. 片上网络路由节点优化设计[J]. 计算机应用, 2011, 31(03): 617-620.
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URL: http://www.joca.cn/EN/10.3724/SP.J.1087.2011.00617
http://www.joca.cn/EN/Y2011/V31/I03/617