Journal of Computer Applications ›› 2018, Vol. 38 ›› Issue (8): 2230-2235.DOI: 10.11772/j.issn.1001-9081.2018020419

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Bloom filter-based wear-leveling scheme for novel hybrid memory architecture

ZHANG Zhen1,2, FU Yinjin1, HU Guyu1   

  1. 1. College of Command and Control Engineering, The Army Engineering University of PLA, Nanjing Jiangsu 210007, China;
    2. Unit 73610 of PLA, Nanjing Jiangsu 210007, China
  • Received:2018-01-29 Revised:2018-03-10 Online:2018-08-10 Published:2018-08-11
  • Supported by:
    This work is partially supported by the Young Science Foundation of the National Natural Science Foundation of China (61402518), the Project of the National Natural Science Foundation of China (61379146).


张震1,2, 付印金1, 胡谷雨1   

  1. 1. 陆军工程大学 指挥控制工程学院, 南京 210007;
    2. 73610部队, 南京 210007
  • 通讯作者: 付印金
  • 作者简介:张震(1992-),男,江苏盐城人,硕士,CCF会员,主要研究方向:缓存算法优化、混合存储;付印金(1984-),男,湖南湘乡人,博士,主要研究方向:大数据管理、网络存储、云计算;胡谷雨(1963-),男,浙江东阳人,博士,主要研究方向:计算机网络、军事通信网络。
  • 基金资助:

Abstract: Phase Change Memory (PCM) is a promising candidate for next-generation main memory due to its low power consumption, but its endurance has limited its further application. The existed DRAM buffering and wear-leveling technologies were proposed to overcome the PCM endurance problem from two design issues:write count reduction and uniform write count distribution. However, the former fails to consider the access tendency when writing back pages. The latter can be further enhanced in terms of operation granularity, space overhead, and random access, especially in data streams of strong spatial locality. Therefore, the authors designed a novel hybrid memory architecture based on DRAM and PCM, proposed a replacement policy according to LRU (Least Recently Used) and LFU-Aging (Least Frequenctly Used with Aging) for the prediction of read and write access tendency, and finally presented a Bloom Filter (BF) based dynamic wear-leveling algorithm for strong-locality applications. The scheme can effectively decrease redundant write operations and realize inter-group wear-leveling with low space-overhead. The experimental results indicate that our scheme can reduce 13.4%-38.6% write operations in PCM and effectively homogenize the distribution of write counts for up to 90% groups.

Key words: Phase Change Memory (PCM), hybrid memory architecture, cache algorithm, Bloom Filter (BF), wear-leveling

摘要: 相变存储器(PCM)凭借低功耗的优势有望成为新一代主存储器,但是耐受性的缺陷成为其广泛应用的重要障碍。现有的随机存取存储器(DRAM)缓存技术和磨损均衡分别从减少PCM写数量以及均匀化写操作分布两个角度延长PCM使用寿命,但前者在写回数据时未考虑数据的读写倾向性,后者在空间局部性较强的应用场景下存在数据交换粒度、空间开销、随机性等诸多问题。因此,设计一种全新的混合存储架构,结合最近最少使用(LRU)算法和带有时间变化的最不经常使用(LFU-Aging)算法提出区分数据读写倾向性的缓存策略,并且基于布隆过滤器(BF)设计针对强空间局部性工作集的动态磨损均衡算法,在有效减少冗余写操作的同时实现低空间开销的组间磨损均衡操作。实验结果表明,该策略能够减少PCM上13.4%~38.6%的写操作,同时有效均匀90%以上分组的写操作分布。

关键词: 相变存储器, 混合存储架构, 缓存算法, 布隆过滤器, 磨损均衡

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