Journal of Computer Applications ›› 2021, Vol. 41 ›› Issue (6): 1734-1740.DOI: 10.11772/j.issn.1001-9081.2020091462

Special Issue: 先进计算

• Advanced computing • Previous Articles     Next Articles

Parallel design and implementation of synthetic view distortion change algorithm in reconfigurable structure

JIANG Lin, SHI Jiaqi, LI Yuancheng   

  1. College of Computer Science and Technology, Xi'an University of Science and Technology, Xi'an Shaanxi 710600, China
  • Received:2020-09-21 Revised:2020-12-03 Online:2021-06-10 Published:2020-12-28
  • Supported by:
    This work is partially supported by the Key Project of National Natural Science Foundation of China (61834005), the General Project of Natural Science Foundation of Shaanxi Province (2020JM-525).


蒋林, 施佳琪, 李远成   

  1. 西安科技大学 计算机科学与技术学院, 西安 710600
  • 通讯作者: 施佳琪
  • 作者简介:蒋林(1970-),男,陕西杨凌人,教授,博士,主要研究方向:专用集成电路设计、计算机体系结构、计算机图形图像处理;施佳琪(1994-),男,陕西西安人,硕士研究生,主要研究方向:计算机体系结构;李远成(1981-),男,河南开封人,讲师,博士,CCF会员,主要研究方向:计算机体系结构、并行计算、人工智能。
  • 基金资助:

Abstract: Focused on the high computational time complexity of the depth map based Synthesized View Distortion Change (SVDC) algorithm in 3D High Efficiency Video Coding (3D-HEVC), a new parallelization method of SVDC algorithm based on hybrid granularity was proposed under the reconfigurable array structure. Firstly, the SVDC algorithm was divided into two parts:Virtual View Synthesis (VVS) and distortion value calculation. Secondly, the VVS part was accelerated by pipeline operation, and the distortion value calculation part was accelerated by dividing into two levels:task level, which means dividing the synthesized image according to pixels, and instruction level, that is dividing the distortion values inside the pixel by the calculation process. Finally, a reconfigurable mechanism was used to parallelize the VVS part and distortion value calculation part. Theoretical analysis and hardware simulation results show that, in terms of execution time, the proposed method has the speedup ratio of 2.11 with 4 Process Elements (PEs). Compared with the SVDC algorithms based on Low Level Virtual Machine (LLVM) and Open Multi-Processing (OpenMP), the proposed method has the calculation time reduced by 18.56% and 21.93% respectively. It can be seen that the proposed method can mine the parallelism of the SVDC algorithm, and effectively shorten the execution time of the SVDC algorithm by combining with the characteristics of the reconfigurable array structure.

Key words: Synthesized View Distortion Change (SVDC) algorithm, High Efficiency Video Coding (HEVC), reconfigurable structure, hybrid granularity, parallelized mapping

摘要: 针对三维高效视频编码(3D-HEVC)中,基于深度图的合成视点失真变化(SVDC)算法存在计算时间复杂度较高的问题,提出了一种在可重构阵列结构下基于混合粒度的SVDC算法并行化方法。首先,将SVDC算法分为虚拟视点合成(VVS)和失真值计算两个部分。其次,VVS部分采用流水线作业方式加速,而失真值计算部分采用两级划分加速:任务级——将合成后的图像按照像素点进行划分,指令级——将像素点内部的失真值按照计算过程进行划分。最后,采用可重构机制将VVS部分和失真值计算部分进行并行化处理。理论分析和硬件仿真结果表明,在执行时间上,采用4个处理单元(PE)的该方法具有2.11的加速比性能,与基于底层虚拟机(LLVM)和共享存储并行编程(OpenMP)的SVDC算法相比,计算时间分别缩短了18.56%和21.93%。可见所提方法能挖掘SVDC算法的并行性,并结合可重构阵列结构特点有效缩短了SVDC算法的执行时间。

关键词: 合成视点失真变化算法, 高效视频编码, 可重构结构, 混合粒度, 并行化映射

CLC Number: