[1] |
HUANG Chengcheng, DONG Xiaoxiao, LI Zhao.
Deep pipeline 5×5 convolution method based on two-dimensional Winograd algorithm
[J]. Journal of Computer Applications, 2021, 41(8): 2258-2264.
|
[2] |
WANG Xiaofeng, JIANG Penglong, ZHOU Hui, ZHAO Xiongbo.
Design of FPGA accelerator with high parallelism for convolution neural network
[J]. Journal of Computer Applications, 2021, 41(3): 812-819.
|
[3] |
SUN Peng, XIAO Jing, ZHAO Haimeng, LIU Fan, YAN Lei, ZHAO Hongying.
Design and implementation of SIFT algorithm for UAV remote sensing image based on DSP platform
[J]. Journal of Computer Applications, 2020, 40(4): 1237-1242.
|
[4] |
XU Yingxin, SUN Lei, ZHAO Jiancheng, GUO Songhui.
Virtual field programmable gate array placement strategy based on ant colony optimization algorithm
[J]. Journal of Computer Applications, 2020, 40(3): 747-752.
|
[5] |
LEI Xiaokang, YIN Zhigang, ZHAO Ruilian.
FPGA-based convolutional neural network fixed-point acceleration
[J]. Journal of Computer Applications, 2020, 40(10): 2811-2816.
|
[6] |
YAO Zhicheng, WU Zhihui, YANG Jian, ZHANG Shengkui.
FIR correction filter design and FPGA implementation for array mutual coupling error
[J]. Journal of Computer Applications, 2019, 39(8): 2374-2380.
|
[7] |
WANG Peng, ZHOU Yan.
MPI big data processing for high performance applications
[J]. Journal of Computer Applications, 2018, 38(12): 3496-3499.
|
[8] |
TAN Haiqing, CHEN Zhengguo, CHEN Wei, XIAO Nong.
Design of DDR3 protocol parsing logic based on FPGA
[J]. Journal of Computer Applications, 2017, 37(5): 1223-1228.
|
[9] |
TANG Guofei, ZHOU Haifang, TAN Qingping.
Design and implementation of space-borne parallel remote sensing image compression system based on multi-core DSP
[J]. Journal of Computer Applications, 2017, 37(5): 1246-1250.
|
[10] |
ZHANG Wang, JIA Jia, MENG Yuan, BAI Xu.
Research and design of AES algorithm based on high-level synthesis
[J]. Journal of Computer Applications, 2017, 37(5): 1341-1346.
|
[11] |
LI Shenglan, JIANG Hongxu, FU Weijian, CHEN Jiao.
Design of DMA controller for multi-channel transmission system based on PCIe
[J]. Journal of Computer Applications, 2017, 37(3): 691-694.
|
[12] |
MAI Taotao, PAN Xiaozhong, WANG Yaqi, SU Yang.
Predefined-class based algorithm for compact regular expression matching
[J]. Journal of Computer Applications, 2017, 37(2): 397-401.
|
[13] |
XUE Jun, DUAN Fajie, JIANG Jiajia, LI Yanchao, YUAN Jianfu, WANG Xianquan.
Parallel cyclic redundancy check Verilog program generating method based on Matlab
[J]. Journal of Computer Applications, 2016, 36(9): 2503-2507.
|
[14] |
ZHUO Yannan, LIU Qiang, JIANG Lei, DAI Qiong.
High-performance regular expressions matching algorithm based on improved FPGA circuit
[J]. Journal of Computer Applications, 2016, 36(4): 927-930.
|
[15] |
HUANG Shengbing, ZHENG Qilong, GUO Lianwei.
SIMD compiler optimization by selecting single or double word mode for clustered VLIW DSP
[J]. Journal of Computer Applications, 2015, 35(8): 2371-2374.
|