[1] LIU B, BAAS B M. Parallel AES encryption engines for many-core processor arrays[J].IEEE Transactions on Computers, 2013,62(3):536-547.
[2] GOKHAN S, DEREK C. Cryptoraptor: High Throughput Reconfigurable Cryptographic Processor[C]// IEEE/ACM International Conference on Computer-Aided Design, New York: IEEE, 2014: 154-161.
[3] WANG B, LIU L B. A Flexible and Energy-Efficient Reconfigurable Architecture for Symmetric Cipher Processing[C]// IEEE International Symposium on Circuits and Systems, New York: IEEE, 2015: 1182-1185.
[4] MICHAEL G, LILIAN B, GUY G, et al. Design and Implementation of A Multi-core Crypto-processor for Software Defined Radios[C]// International Symposium on Reconfigurable Computing Architectures, Tools and Applications, New York: IEEE, 2011: 29-40.
[5] BOSSUET L, GRAND M, GASPAR L, et al. Architectures of flexible symmetric key crypto engines--a survey: from hardware coprocessor to multi-crypto-processor system on chip [J]. ACM Computing Surveys, 2013, 45(4):115-123.
[6] 王寿成,严迎建,徐进辉,等.可重构密码流体系结构模拟器设计与实现[J].计算机工程与设计,2016,37(11):2923-2927. (WANG S C, YAN Y J, XU J H. Design and implementation of reconfigurable cipher stream processor simulator[J]. Computer Engineering and Design, 2016,37(11):2923-2927.)
[7] IQBAL N, SIDDIQUE M A, HENKEL J. RMOT: recursion in model order for task execution time estimation in a software pipeline [C]// IEEE Design, Automation & Test in Europe Conference &Exhibition Dresden, New York: IEEE, 2010, 953-956.
[8] 郭岩松, 刘雷波. 一种面向分组密码的粗粒度可重构阵列及AES算法映射[J]. 微电子学与计算机, 2015, 32(9): 1-5. (GUO Y S, LIU L B. A block cipher oriented coarse-grained reconfigurable array and AES algorithm mapping[J]. Microelectronics & Computer, 2015, 32(9): 1-5.)
[9] 李校南, 王雪瑞, 戴紫彬, 等. 可重构分簇式分组密码处理架构[J]. 计算机应用与软件, 2014, 31(1): 315-318. (LI J N, WANG X R, DAI Z B, et al. Reconfigurable clustered block cipher processing architecture[J]. Computer Application and Software, 2014, 31(1): 315-318.)
[10] DIMITRIS T, ALEXANDROS S, DIONISIS P. CCproc: an efficient cryptography coprocessor [C]// Proceedings of 16th IFIP/IEEE International Conference on Very Large Scale Integration, New York: IEEE, 2008: 160-163.
|