[1] CHEN C L, CHIU G M. A fault-tolerant routing scheme for meshes with nonconvex faults[J]. IEEE Transactions on Parallel and Distributed Systems, 2001, 12(5):467-475. [2] ZHOU J P, LAU F C M. Multi-phase minimal fault-tolerant wormhole routing in meshes[J]. Parallel Computing, 2004, 30(3):423-442. [3] FLICH J, SKEIE T, MEJIA A, et al. A survey and evaluation of topology-agnostic deterministic routing algorithms[J]. IEEE Transactions on Parallel and Distributed Systems, 2012, 23(3):405-423. [4] DUATO J, YALAMANCHILI S, NI L. Interconnection Networks:An Engineering Approach[M]. San Francisco:Morgan Kaufmann Publishers, 2003:190-194. [5] SANCHO J, ROBLES A, DUATO J. An effective methodology to improve the performance of the up*/down* routing algorithm[J]. IEEE Transactions on Parallel and Distributed Systems, 2004, 15(8):740-753. [6] MEJIA A, FLICH J, DUATO J, et al. Segment-based routing:an efficient fault-tolerant routing algorithm for meshes and tori[C]//Proceedings of the 20th International Parallel and Distributed Processing Symposium. Washington, DC:IEEE Computer Society, 2006:10-19. [7] FLICH J, RODRIGO S, DUATO J. An efficient implementation of distributed routing algorithms for NoCs[C]//Proceedings of the 2nd ACM/IEEE International Symposium on Networks-on-Chip. Washington, DC:IEEE Computer Society, 2008:87-96. [8] 姚磊, 蔡觉平, 李赞, 等. 2D-Mesh结构片上网络无虚通道容错路由算法[J]. 西安电子科技大学学报(自然科学版), 2012, 39(6):26-33. (YAO L, CAI J P, LI Z, el al. Fault-tolerant routing algorithm for the 2D-Mesh network-on-chip without using virtual channels[J]. Journal of Xidian University(Natural Science), 2012, 39(6):26-33.) [9] 周磊, 吴宁, 李云. 一种基于2D-mesh的片上网络无死锁容错路由算法[J]. 上海交通大学学报, 2013, 47(1):18-22. (ZHOU L, WU N, LI Y. A fault-tolerant and deadlock-free routing algorithm in 2D-mesh for network on chip[J]. Journal of Shanghai Jiaotong University, 2013, 47(1):18-22.) [10] HOLSMARK R, KUMAR S, PALESI M, et al. HiRA:a methodology for deadlock free routing in hierarchical networks on chip[C]//Proceedings of the 3rd ACM/IEEE International Symposium on Networks-on-Chip. Washington, DC:IEEE Computer Society, 2009:2-11. [11] DUBOIS F, SHEIBANYRAD A, PETROT F, et al. Elevator-first:a deadlock-free distributed routing algorithm for vertically partially connected 3D-NoCs[J]. IEEE Transactions on Computers, 2013, 62(3):609-615. [12] DALLY W J, SEITZ C L. Deadlock-free message routing in multiprocessor interconnection networks[J]. IEEE Transactions on Computers, 1987, 36(5):547-553. BackgroundHU Zhekun, born in 1986, Ph. D., engineer. His research interests include network on-chip, multicore parallel computing.YANG Shengchun, born in 1971, M. S., senior engineer. His research interests include network communication protocol.CHEN Jie, born in 1963, Ph. D., professor. His research interest include multicore computer architecture. |