The problem of NoC (Network on Chip) mapping for complex SoC (System on Chip) chip is urgently needed to be solved while most of the existing mapping schemes do not considered testing requirements. This paper proposed a novel NoC mapping algorithm optimized for testing, which considered the improvement of testability and the minimization of mapping cost together. Firstly, the partition algorithm was adopted to arrange all the IP cores into parallel testing groups, combined with the optimized test structure, so that the testing time was minimized. Then, based on traffic information between IP cores, genetic algorithm was applied to accomplish the NoC mapping, which was aimed to the minimum mapping cost. The experimental results on ITC02 benchmark circuits show that the testing time can be reduced by 12.67% on average and the mapping costs decreased by 24.5% on average compared with the random mapping.
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